Written by Mitch Tasman, LeafLabs, Senior Member of Technical Staff
*A pair of conductors carrying a differential signal will be referred to as a differential pair
Noise reduction using differential signaling
Introduction
Have you wondered how information is carried over a modern interface like USB-C, or if the manufacturer of your smartphone decides not to provide a 3.5mm headset jack, how audio is routed? This post is intended to address these questions at a high level: I’ll embed various links to additional information, for those who care to explore further.
Interface Standards for Pluggable Modules
There are some interesting trends converging on interface standards for pluggable peripherals and modules. Limiting pin count is a key desire, to reduce footprint and cost, and maximize reliability. Minimizing power consumption is a key desire for any portable battery-powered device. A key enabler and common element is low-voltage differential signaling
A general trend in interface design is to provide two or more differential pairs with embedded clocking that are suitable for high-speed communication at relatively low power, and with reasonable noise immunity. To allow for clock recovery by the receiver, and enhance data transmission reliability, data is typically encoded in some manner, leaving some bandwidth on the table. With 8b/10b encoding, for example, the overhead is approximately 20%.
With appropriate cable and connector design, typical clock rates on a differential pair are in the range of 1.5 Gigabits per second (Gbps) to 5 Gbps. With more sophisticated encoding and sufficient care in termination and equalization, 10 Gbps is achievable. As an alternative, or to achieve still higher data rates, one can stripe or otherwise partition data across multiple differential pairs in parallel. While some PHY layers run with a fixed configuration, the M-PHY® layer that underpins UniPro has highly configurable differential pairs.
In addition to the high-speed signaling, interfaces typically include:
power and ground, for powering attached devices -- or accepting power from such devices, in some cases
some lower speed signals for detection of connector orientation and/or the type/function/needs of an attached device.
And may include:
additional pins for auxiliary signaling, such as SBU1 and SBU2 (Sideband Use) on the USB-C connector
an additional differential pair for legacy USB 2.0 communication or other purposes
So, what is done with these differential pairs? There are at least two possibilities, plus hybrids.
A multiplexed architecture, where multiple device and/or interface types are supported by a common link layer and PHY layer, such as USB 3.0, UniPro, and PCI Express (PCIe).
A multiplexed approach can be of benefit if a networked, versus point-to-point architecture, is desired, as in PCIe or the UniPro-based Project Ara
However, where legacy interfaces and protocols are present, they do need to be converged/adapted to run over the common stack.
A switched architecture, where the differential pairs are repurposed to carry different signals.
For example, with USB-C, where four high-speed differential pairs are available:
in one configuration, one pair is used for TX and one for RX, to support USB 3.0 and USB 3.1.
in an alternate mode, all 4 differential pairs are used in a TX configuration to support DisplayPort, and the SBU1 and SBU2 lines carry DisplayPort’s differential AUX channel.
in yet another mode, the interface’s signal paths are creatively reused to carry analog audio: The legacy USB 2.0 D+ and D- pins provided on the USB-C connector are repurposed to carry the right and left analog audio channels, and the SBU1 and SBU2 lines are used to carry Mic and Audio Ground.
Although switching adds complexity, it allows legacy interfaces to be run point-to-point in their native mode, with minimal adaptation.
Switching may also be useful and necessary for handling connector orientation, as in USB-C or Apple’s Lightning® connector.
A hybrid architecture, as exemplified by the first generation of Moto Mods™ where two high speed differential pairs might:
carry UniPro, which in turn multiplexes CSI and DSI interfaces (and I2S for normal-resolution audio).
carry USB 3.0, which can multiplex an arbitrary number of device types.
carry I2S, for high-resolution audio. In this case, the differential pairs aren’t actually used to carry differential signals, but rather are used individually to carry audio data in, audio data out, bit clock, and word clock.
So, in summary, there are some common trends and enabling technologies in recent interface standards, but there are also some notable differences in approach.
Case Study: Audio
For years, the 3.5mm headset jack has been a ubiquitous analog audio interface on portable devices, but that is beginning to change, due to a combination of reliability, water resistance, space, and perhaps market considerations.
Although a wireless headset is certainly a valid alternative, how might one handle audio data in a modern pluggable interface? There are at least a few options that are not necessarily exclusive:
- multiplex digital audio over a protocol stack such as USB 3.0 or UniPro.
multiplex digital audio over a legacy protocol stack such as USB 2.0, if available.
carry audio in digital form, but via a more primitive interface such as I2S. This is one of the options for MotoMods, as noted above, and I2S is also supported on the M.2 expansion card connector.
carry audio in analog form via an interface’s signal paths, e.g. as offered by USB-C.
For USB-C, digital and analog audio are both possible implementations, and might not be mutually exclusive on a single platform. Legacy headsets and speakers can attach to the USB-C connector via a 3.5mm to USB-C adapter, and leverage A/D and D/A converters and amplifiers built into the platform. Alternatively, USB-C Digital Audio provides access to audio signals in digital form, where value-add external ADC/DAC and amplifiers can provide potentially better sound quality, assuming:
stability of the recovered clock, or the ability of the peripheral to pace data flow using a stable reference clock.
ample, stable power via the interface (or an external power source).
careful design of the external peripheral.
The iPhone 7 lacks a 3.5mm analog audio jack, leaving the Lightning connector and wireless as the options for interfacing a headset. Initial reports suggest that audio at the Lightning receptacle is in digital form, and is converted to/from analog via circuitry embedded in the body of the Lightning connector of the supplied Lightning to 3.5mm adapter. While it’s uncertain that this particular implementation would yield equal or better audio quality than the direct 3.5mm analog audio interface on earlier iPhone generations, accessory manufacturers presumably will have the opportunity to build value-add audio solutions into their products, whether as “dongles” or fully integrated solutions. Whether any Apple products have the ability to output/input analog audio via a Lightning receptacle is unclear at the present time.
